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ASIC / Chip Design Engineer

ASIC / Chip Design Engineer

ASIC / Chip Design Engineers at high-growth companies earn $165K–$238K. Median: $201K. Based on 158 public job postings (2025–2026).

💰 $165K–$238K salary range

Median: $201K  ·  Based on 158 public job postings  ·  Updated July 1, 2026


Crafting the specialized hardware that powers cutting-edge artificial intelligence, these engineers architect and implement high-performance, energy-efficient custom silicon tailored for accelerating neural networks and complex AI workloads. Compensation for this role ranges from $198K to $272K, with a median of $230K, derived from 43 analyzed job postings within high-growth companies. Professionals commanding top pay demonstrate expertise in custom AI accelerator IP design, advanced power optimization for compute-intensive models, and high-bandwidth memory (HBM) integration. A strong foundation in hardware verification methodologies and high-speed digital design is also highly valued, ensuring robust and scalable AI inference and training solutions crucial for product leadership.

📊 Salary breakdown

ASIC / Chip Design Engineer salary by location

  • All locations: $201K median ($165K–$238K typical range)
  • Austin: $157K median, $144K–$184K range (-22% vs. national)
  • Seattle: $215K median, $205K–$236K range (+7% vs. national)
  • San Diego: $148K median, $129K–$159K range (-27% vs. national)
  • San Francisco: $170K median, $170K–$188K range (-16% vs. national)
  • New York: $275K median, $271K–$275K range (+37% vs. national)

Highest paying companies

Seattle

  • K2 Space: $215K median

Austin

  • Graphcore: $234K median
  • Amazon: $144K median

Based on companies with 3+ active postings. Median of publicly advertised salary range.

What's typically included

  • Health insurance: 91% of postings
  • Equity (RSU/options): 87% of postings
  • Flexible PTO: 59% of postings
  • Parental leave: 72% of postings
  • Learning/education budget: 4% of postings
  • Visa sponsorship: 1% of postings

Typical experience required: 6–11 years.

Product salaries by seniority

What does a ASIC / Chip Design Engineer do?

ASIC / Chip Design Engineers are product leaders who decide what gets built and why, across engineering, design, and go-to-market. This benchmark reflects Manager-level base compensation at high-growth and AI-native companies.

Common questions

What is the average ASIC / Chip Design Engineer salary at an AI startup?
The median pay is $201K, with a typical range of $165K–$238K, based on 158 public job postings collected in 2025–2026.

Where does this salary data come from?
It is aggregated from public job postings on company career pages — no private placement or client data. We require a minimum of 15 postings per role.

Methodology

Figures are the midpoint of each posting's advertised USD salary range, aggregated from 158 public job postings (2025–2026). The range shown is the 25th–75th percentile; the median is the 50th percentile. Equity is separate and not included; where a posting's range reflects on-target earnings (OTE) for commission roles, that is included in the midpoint. Roles require at least 15 postings to be published. Last refreshed July 1, 2026.

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